Initial public release.

This commit is contained in:
Joe Kearney 2025-02-01 19:22:12 -06:00
parent 7b169e8116
commit dac4af8d25
255 changed files with 68595 additions and 2 deletions

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/***************************************************************************//**
* \file dfu_cm0p.ld
* \version 3.0
*
* The linker file for the GNU C compiler.
* Used for DFU SDK core0 firmware projects.
*
* \note The linker files included with the PDL template projects must be generic
* and handle all common use cases. Your project may not use every section
* defined in the linker files. In that case, you may see warnings during the
* build process. In your project, simply comment out or remove the
* relevant code in the linker file.
*
********************************************************************************
* \copyright
* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
*******************************************************************************/
OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
SEARCH_DIR(.)
GROUP(-lgcc -lc -lnosys)
ENTRY(Reset_Handler)
/*
* Forces symbol to be added to the output file.
* Otherwise linker may remove it if founds that it is not used in the project.
* This command has the same effect as the -u command-line option.
*/
EXTERN(Reset_Handler)
/*******************************************************************************
* Start of CM4 and CM0+ linker script common region
*******************************************************************************/
/*
* Memory regions, for each application and MCU core.
*/
MEMORY
{
flash_app0_core0 (rx) : ORIGIN = 0x10000000, LENGTH = 0x10000
flash_app0_core1 (rx) : ORIGIN = 0x10010000, LENGTH = 0x30000
flash_app1_core0 (rx) : ORIGIN = 0x10040000, LENGTH = 0x30000
flash_app1_core1 (rx) : ORIGIN = 0x10070000, LENGTH = 0x50000
flash_storage (rw) : ORIGIN = 0x100D0000, LENGTH = 0x1000
flash_boot_meta (rw) : ORIGIN = 0x100FFA00, LENGTH = 0x400
sflash_user_data (rx) : ORIGIN = 0x16000800, LENGTH = 0x800
sflash_nar (rx) : ORIGIN = 0x16001A00, LENGTH = 0x200
sflash_public_key (rx) : ORIGIN = 0x16005A00, LENGTH = 0xC00
sflash_toc_2 (rx) : ORIGIN = 0x16007C00, LENGTH = 0x400
efuse (r) : ORIGIN = 0x90700000, LENGTH = 0x100000
ram_common (rwx) : ORIGIN = 0x08000000, LENGTH = 0x0100
/* note: all the ram_appX_core0 regions has to be 0x100 aligned */
/* and the ram_appX_core1 regions has to be 0x400 aligned */
/* as they contain Interrupt Vector Table Remapped at the start */
ram_app0_core0 (rwx) : ORIGIN = 0x08000100, LENGTH = 0x7F00
ram_app0_core1 (rwx) : ORIGIN = 0x08008000, LENGTH = 0x8000
ram_app1_core0 (rwx) : ORIGIN = 0x08000100, LENGTH = 0x7F00
ram_app1_core1 (rwx) : ORIGIN = 0x08008000, LENGTH = 0x30000
/* This is a 32K flash region used for EEPROM emulation. This region can also be used as the general purpose flash.
* You can assign sections to this memory region for only one of the cores.
* Note some middleware (e.g. BLE, Emulated EEPROM) can place their data into this memory region.
* Therefore, repurposing this memory region will prevent such middleware from operation.
*/
em_eeprom (rx) : ORIGIN = 0x14000000, LENGTH = 0x4000 /* 16 KB */
xip (rx) : ORIGIN = 0x18000000, LENGTH = 0x08000000
}
/* Regions parameters */
/* Flash */
__cy_memory_0_start = 0x10000000;
__cy_memory_0_length = 0x00100000;
__cy_memory_0_row_size = 0x200;
/* Emulated EEPROM Flash area */
__cy_memory_1_start = 0x14000000;
__cy_memory_1_length = 0x8000;
__cy_memory_1_row_size = 0x200;
/* Supervisory Flash */
__cy_memory_2_start = 0x16000000;
__cy_memory_2_length = 0x8000;
__cy_memory_2_row_size = 0x200;
/* XIP */
__cy_memory_3_start = 0x18000000;
__cy_memory_3_length = 0x08000000;
__cy_memory_3_row_size = 0x200;
/* eFuse */
__cy_memory_4_start = 0x90700000;
__cy_memory_4_length = 0x100000;
__cy_memory_4_row_size = 1;
/* The DFU SDK metadata limits */
__cy_boot_metadata_addr = ORIGIN(flash_boot_meta);
__cy_boot_metadata_length = __cy_memory_0_row_size;
/* The Product ID, used by CyMCUElfTool to generate a updating file */
__cy_product_id = 0x01020304;
/* The checksum type used by CyMCUElfTool to generate a updating file */
__cy_checksum_type = 0x00;
/* Used by the DFU SDK application to set the metadata */
__cy_app0_verify_start = ORIGIN(flash_app0_core0);
__cy_app0_verify_length = LENGTH(flash_app0_core0) + LENGTH(flash_app0_core1) - __cy_boot_signature_size;
__cy_app1_verify_start = ORIGIN(flash_app1_core0);
__cy_app1_verify_length = LENGTH(flash_app1_core0) + LENGTH(flash_app1_core1) - __cy_boot_signature_size;
/*
* The size of the application signature.
* E.g. 4 for CRC-32,
* 32 for SHA256,
* 256 for RSA 2048.
*/
__cy_boot_signature_size = 256;
/*******************************************************************************
* End of CM4 and CM0+ linker script common region
*******************************************************************************/
/*
* DFU SDK specific: aliases regions, so the rest of code does not use
* application specific memory region names
*/
REGION_ALIAS("flash", flash_app1_core0);
REGION_ALIAS("flash_core1", flash_app1_core1);
REGION_ALIAS("ram", ram_app1_core0);
/* DFU SDK specific: sets an app Id */
__cy_app_id = 1;
/*
* DFU SDK specific: sets a start address of the Core1 application image,
* more specifically an address of the Core1 interrupt vector table.
* CM0+ uses this information to launch Core1.
*/
__cy_app_core1_start_addr = ORIGIN(flash_core1); /* used to start Core1 from Core0 */
/* DFU SDK specific */
/* CyMCUElfTool uses these ELF symbols to generate an application signature */
__cy_app_verify_start = ORIGIN(flash);
__cy_app_verify_length = LENGTH(flash) + LENGTH(flash_core1) - __cy_boot_signature_size;
/* Library configurations */
GROUP(libgcc.a libc.a libm.a libnosys.a)
/* The linker script defines how to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code:
* Reset_Handler : Entry of reset handler
*
* This linker script defines the symbols, which can be used by code without a definition:
* __exidx_start
* __exidx_end
* __copy_table_start__
* __copy_table_end__
* __zero_table_start__
* __zero_table_end__
* __etext
* __data_start__
* __preinit_array_start
* __preinit_array_end
* __init_array_start
* __init_array_end
* __fini_array_start
* __fini_array_end
* __data_end__
* __bss_start__
* __bss_end__
* __end__
* end
* __HeapLimit
* __StackLimit
* __StackTop
* __stack
* __Vectors_End
* __Vectors_Size
*
* For the DFU SDK, these additional symbols are defined:
* __cy_app_id
* __cy_product_id
* __cy_checksum_type
* __cy_app_core1_start_addr
* __cy_boot_metadata_addr
* __cy_boot_metadata_length
*/
SECTIONS
{
/* DFU SDK specific */
/* The noinit section, used across all the applications */
.cy_boot_noinit (NOLOAD) :
{
KEEP(*(.cy_boot_noinit));
} > ram_common
/* The last byte of the section is used for AppId to be shared between all the applications */
.cy_boot_noinit.appId ORIGIN(ram_common) + LENGTH(ram_common) - 1 (NOLOAD) :
{
KEEP(*(.cy_boot_noinit.appId));
} > ram_common
/* App0 uses it to initialize DFU SDK metadata, in the dfu_user.c file */
.cy_boot_metadata :
{
KEEP(*(.cy_boot_metadata))
} > flash_boot_meta
.cy_app_header :
{
KEEP(*(.cy_app_header))
} > flash
.text :
{
. = ALIGN(4);
__Vectors = . ;
KEEP(*(.vectors))
. = ALIGN(4);
__Vectors_End = .;
__Vectors_Size = __Vectors_End - __Vectors;
__end__ = .;
. = ALIGN(4);
*(.text*)
KEEP(*(.init))
KEEP(*(.fini))
/* .ctors */
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
*(SORT(.ctors.*))
*(.ctors)
/* .dtors */
*crtbegin.o(.dtors)
*crtbegin?.o(.dtors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
*(SORT(.dtors.*))
*(.dtors)
/* Read-only code (constants). */
*(.rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
KEEP(*(.eh_frame*))
} > flash
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > flash
__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > flash
__exidx_end = .;
/* To copy multiple ROM to the RAM sections,
* uncomment .copy.table section and,
* define __STARTUP_COPY_MULTIPLE in startup_{device}_cm0plus.S */
.copy.table :
{
. = ALIGN(4);
__copy_table_start__ = .;
/* Copy interrupt vectors from Flash to RAM */
LONG (__Vectors) /* From */
LONG (__ram_vectors_start__) /* To */
LONG (__Vectors_End - __Vectors) /* Size */
/* Copy data section to RAM */
LONG (__etext) /* From */
LONG (__data_start__) /* To */
LONG (__data_end__ - __data_start__) /* Size */
__copy_table_end__ = .;
} > flash
/* To clear multiple BSS sections,
* uncomment .zero.table section and,
* define __STARTUP_CLEAR_BSS_MULTIPLE in startup_{device}_cm0plus.S */
.zero.table :
{
. = ALIGN(4);
__zero_table_start__ = .;
LONG (__bss_start__)
LONG (__bss_end__ - __bss_start__)
__zero_table_end__ = .;
} > flash
__etext = . ;
.ramVectors (NOLOAD) : ALIGN(8)
{
__ram_vectors_start__ = .;
KEEP(*(.ram_vectors))
__ram_vectors_end__ = .;
} > ram
.data __ram_vectors_end__ : AT (__etext)
{
__data_start__ = .;
*(vtable)
*(.data*)
. = ALIGN(4);
/* preinit data */
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP(*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(4);
/* init data */
PROVIDE_HIDDEN (__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(4);
/* finit data */
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP(*(SORT(.fini_array.*)))
KEEP(*(.fini_array))
PROVIDE_HIDDEN (__fini_array_end = .);
KEEP(*(.jcr*))
. = ALIGN(4);
KEEP(*(.cy_ramfunc*))
. = ALIGN(4);
__data_end__ = .;
} > ram
/* Place variables in the section that should not be initialized during the
* device startup.
*/
.noinit (NOLOAD) : ALIGN(8)
{
KEEP(*(.noinit))
} > ram
/* The uninitialized global or static variables are placed in this section.
*
* The NOLOAD attribute tells the linker that the .bss section does not consume
* any space in the image. The NOLOAD attribute changes the .bss type to
* NOBITS, and that makes the linker: A) not allocate the section in memory;
* B) put information to clear the section with all zeros during application
* loading.
*
* Without the NOLOAD attribute, the .bss section might get the PROGBITS type.
* This makes the linker: A) allocate the zeroed section in memory; B) copy
* this section to RAM during application loading.
*/
.bss (NOLOAD):
{
. = ALIGN(4);
__bss_start__ = .;
*(.bss*)
*(COMMON)
. = ALIGN(4);
__bss_end__ = .;
} > ram
.heap (NOLOAD):
{
__HeapBase = .;
__end__ = .;
end = __end__;
KEEP(*(.heap*))
__HeapLimit = .;
} > ram
/* The .stack_dummy section doesn't contain any symbols. It is only
* used for the linker to calculate the size of the stack sections, and assign
* values to the stack symbols later */
.stack_dummy (NOLOAD):
{
KEEP(*(.stack*))
} > ram
/* Set the stack top to the end of RAM, and the stack limit move down by
* the size of the stack_dummy section */
__StackTop = ORIGIN(ram) + LENGTH(ram);
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
/* Emulated EEPROM Flash area */
.cy_em_eeprom :
{
KEEP(*(.cy_em_eeprom))
} > em_eeprom
/* Supervisory Flash: User data */
.cy_sflash_user_data :
{
KEEP(*(.cy_sflash_user_data))
} > sflash_user_data
/* Supervisory Flash: Normal Access Restrictions (NAR) */
.cy_sflash_nar :
{
KEEP(*(.cy_sflash_nar))
} > sflash_nar
/* Supervisory Flash: Public Key */
.cy_sflash_public_key :
{
KEEP(*(.cy_sflash_public_key))
} > sflash_public_key
/* Supervisory Flash: Table of Content # 2 */
.cy_toc_part2 :
{
KEEP(*(.cy_toc_part2))
} > sflash_toc_2
/* Places the code in the Execute in the Place (XIP) section. See the smif driver
* documentation for details.
*/
.cy_xip :
{
KEEP(*(.cy_xip))
} > xip
/* eFuse */
.cy_efuse :
{
KEEP(*(.cy_efuse))
} > efuse
/* These sections are used for additional metadata (silicon revision,
* Silicon/JTAG ID, etc.) storage.
*/
.cymeta 0x90500000 : { KEEP(*(.cymeta)) } :NONE
}
/* EOF */