Initial public release of the 2024A software.
This commit is contained in:
Joe Kearney
parent
7b9ad3edfd
commit
303e9e1dad
361 changed files with 60083 additions and 2 deletions
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@ -0,0 +1,486 @@
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/* ***** BEGIN LICENSE BLOCK *****
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* Version: RCSL 1.0/RPSL 1.0
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*
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* Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved.
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*
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* The contents of this file, and the files included with this file, are
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* subject to the current version of the RealNetworks Public Source License
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* Version 1.0 (the "RPSL") available at
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* http://www.helixcommunity.org/content/rpsl unless you have licensed
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* the file under the RealNetworks Community Source License Version 1.0
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* (the "RCSL") available at http://www.helixcommunity.org/content/rcsl,
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* in which case the RCSL will apply. You may also obtain the license terms
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* directly from RealNetworks. You may not use this file except in
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* compliance with the RPSL or, if you have a valid RCSL with RealNetworks
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* applicable to this file, the RCSL. Please see the applicable RPSL or
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* RCSL for the rights, obligations and limitations governing use of the
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* contents of the file.
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*
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* This file is part of the Helix DNA Technology. RealNetworks is the
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* developer of the Original Code and owns the copyrights in the portions
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* it created.
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*
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* This file, and the files included with this file, is distributed and made
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* available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
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* EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES,
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* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
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*
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* Technology Compatibility Kit Test Suite(s) Location:
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* http://www.helixcommunity.org/content/tck
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*
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* Contributor(s):
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*
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* ***** END LICENSE BLOCK ***** */
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/**************************************************************************************
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* Fixed-point MP3 decoder
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* Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com)
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* June 2003
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*
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* assembly.h - assembly language functions and prototypes for supported platforms
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*
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* - inline rountines with access to 64-bit multiply results
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* - x86 (_WIN32) and ARM (ARM_ADS, _WIN32_WCE) versions included
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* - some inline functions are mix of asm and C for speed
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* - some functions are in native asm files, so only the prototype is given here
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*
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* MULSHIFT32(x, y) signed multiply of two 32-bit integers (x and y), returns top 32 bits of 64-bit result
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* FASTABS(x) branchless absolute value of signed integer x
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* CLZ(x) count leading zeros in x
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* MADD64(sum, x, y) (Windows only) sum [64-bit] += x [32-bit] * y [32-bit]
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* SHL64(sum, x, y) (Windows only) 64-bit left shift using __int64
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* SAR64(sum, x, y) (Windows only) 64-bit right shift using __int64
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*/
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#ifndef _ASSEMBLY_H
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#define _ASSEMBLY_H
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#if (defined _WIN32 && !defined _WIN32_WCE) || (defined __WINS__ && defined _SYMBIAN) || defined(_OPENWAVE_SIMULATOR) || defined(WINCE_EMULATOR) /* Symbian emulator for Ix86 */
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#pragma warning( disable : 4035 ) /* complains about inline asm not returning a value */
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static __inline int MULSHIFT32(int x, int y)
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{
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__asm {
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mov eax, x
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imul y
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mov eax, edx
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}
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}
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static __inline int FASTABS(int x)
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{
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int sign;
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sign = x >> (sizeof(int) * 8 - 1);
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x ^= sign;
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x -= sign;
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return x;
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}
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static __inline int CLZ(int x)
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{
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int numZeros;
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if (!x)
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return (sizeof(int) * 8);
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numZeros = 0;
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while (!(x & 0x80000000)) {
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numZeros++;
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x <<= 1;
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}
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return numZeros;
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}
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/* MADD64, SHL64, SAR64:
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* write in assembly to avoid dependency on run-time lib for 64-bit shifts, muls
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* (sometimes compiler thunks to function calls instead of code generating)
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* required for Symbian emulator
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*/
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#ifdef __CW32__
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typedef long long Word64;
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#else
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typedef __int64 Word64;
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#endif
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static __inline Word64 MADD64(Word64 sum, int x, int y)
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{
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unsigned int sumLo = ((unsigned int *)&sum)[0];
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int sumHi = ((int *)&sum)[1];
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__asm {
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mov eax, x
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imul y
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add eax, sumLo
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adc edx, sumHi
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}
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/* equivalent to return (sum + ((__int64)x * y)); */
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}
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static __inline Word64 SHL64(Word64 x, int n)
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{
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unsigned int xLo = ((unsigned int *)&x)[0];
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int xHi = ((int *)&x)[1];
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unsigned char nb = (unsigned char)n;
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if (n < 32) {
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__asm {
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mov edx, xHi
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mov eax, xLo
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mov cl, nb
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shld edx, eax, cl
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shl eax, cl
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}
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} else if (n < 64) {
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/* shl masks cl to 0x1f */
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__asm {
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mov edx, xLo
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mov cl, nb
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xor eax, eax
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shl edx, cl
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}
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} else {
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__asm {
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xor edx, edx
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xor eax, eax
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}
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}
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}
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static __inline Word64 SAR64(Word64 x, int n)
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{
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unsigned int xLo = ((unsigned int *)&x)[0];
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int xHi = ((int *)&x)[1];
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unsigned char nb = (unsigned char)n;
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if (n < 32) {
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__asm {
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mov edx, xHi
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mov eax, xLo
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mov cl, nb
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shrd eax, edx, cl
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sar edx, cl
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}
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} else if (n < 64) {
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/* sar masks cl to 0x1f */
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__asm {
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mov edx, xHi
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mov eax, xHi
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mov cl, nb
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sar edx, 31
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sar eax, cl
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}
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} else {
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__asm {
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sar xHi, 31
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mov eax, xHi
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mov edx, xHi
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}
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}
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}
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#elif (defined _WIN32) && (defined _WIN32_WCE)
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/* use asm function for now (EVC++ 3.0 does horrible job compiling __int64 version) */
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#define MULSHIFT32 xmp3_MULSHIFT32
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int MULSHIFT32(int x, int y);
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static __inline int FASTABS(int x)
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{
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int sign;
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sign = x >> (sizeof(int) * 8 - 1);
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x ^= sign;
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x -= sign;
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return x;
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}
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static __inline int CLZ(int x)
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{
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int numZeros;
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if (!x)
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return (sizeof(int) * 8);
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numZeros = 0;
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while (!(x & 0x80000000)) {
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numZeros++;
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x <<= 1;
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}
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return numZeros;
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}
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#elif defined ARM_ADS
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static __inline int MULSHIFT32(int x, int y)
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{
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/* important rules for smull RdLo, RdHi, Rm, Rs:
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* RdHi and Rm can't be the same register
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* RdLo and Rm can't be the same register
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* RdHi and RdLo can't be the same register
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* Note: Rs determines early termination (leading sign bits) so if you want to specify
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* which operand is Rs, put it in the SECOND argument (y)
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* For inline assembly, x and y are not assumed to be R0, R1 so it shouldn't matter
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* which one is returned. (If this were a function call, returning y (R1) would
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* require an extra "mov r0, r1")
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*/
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int zlow;
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__asm {
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smull zlow,y,x,y
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}
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return y;
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}
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static __inline int FASTABS(int x)
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{
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int t=0; /*Really is not necessary to initialiaze only to avoid warning*/
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__asm {
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eor t, x, x, asr #31
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sub t, t, x, asr #31
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}
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return t;
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}
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static __inline int CLZ(int x)
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{
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int numZeros;
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if (!x)
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return (sizeof(int) * 8);
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numZeros = 0;
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while (!(x & 0x80000000)) {
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numZeros++;
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x <<= 1;
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}
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return numZeros;
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}
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#elif defined(__GNUC__) && defined(ARM)
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#if defined(ARM7DI)
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typedef long long Word64;
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static __inline int MULSHIFT32(int x, int y) {
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return x * y;
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}
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static __inline Word64 SAR64(Word64 x, int n) {
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return x >>= n;
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}
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typedef union _U64 {
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Word64 w64;
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struct {
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/* x86 = little endian */
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unsigned int lo32;
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signed int hi32;
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} r;
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} U64;
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static __inline Word64 MADD64(Word64 sum64, int x, int y)
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{
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sum64 += (Word64)x * (Word64)y;
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return sum64;
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}
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#else
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static __inline int MULSHIFT32(int x, int y)
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{
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/* important rules for smull RdLo, RdHi, Rm, Rs:
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* RdHi and Rm can't be the same register
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* RdLo and Rm can't be the same register
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* RdHi and RdLo can't be the same register
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* Note: Rs determines early termination (leading sign bits) so if you want to specify
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* which operand is Rs, put it in the SECOND argument (y)
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* For inline assembly, x and y are not assumed to be R0, R1 so it shouldn't matter
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* which one is returned. (If this were a function call, returning y (R1) would
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* require an extra "mov r0, r1")
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*/
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int zlow;
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__asm__ volatile ("smull %0,%1,%2,%3" : "=&r" (zlow), "=r" (y) : "r" (x), "1" (y)) ;
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return y;
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}
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#endif
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static __inline int FASTABS(int x)
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{
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int t=0; /*Really is not necessary to initialiaze only to avoid warning*/
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__asm__ volatile (
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"eor %0,%2,%2, asr #31;"
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"sub %0,%1,%2, asr #31;"
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: "=&r" (t)
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: "0" (t), "r" (x)
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);
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return t;
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}
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static __inline int CLZ(int x)
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{
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int numZeros;
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if (!x)
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return (sizeof(int) * 8);
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numZeros = 0;
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while (!(x & 0x80000000)) {
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numZeros++;
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x <<= 1;
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}
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return numZeros;
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}
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#else
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#ifdef __riscv
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typedef long long Word64;
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static __inline int MULSHIFT32(int x, int y)
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{
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unsigned int result = 0;
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asm volatile ("mulh %0, %1, %2" : "=r"(result): "r"(x), "r"(y));
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return result;
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}
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static __inline int FASTABS(int x)
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{
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int sign;
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sign = x >> (sizeof(int) * 8 - 1);
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x ^= sign;
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x -= sign;
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return x;
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}
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static __inline int CLZ(int x)
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{
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int numZeros;
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if (!x)
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return (sizeof(int) * 8);
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numZeros = 0;
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while (!(x & 0x80000000)) {
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numZeros++;
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x <<= 1;
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}
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return numZeros;
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}
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static __inline Word64 MADD64(Word64 sum, int a, int b)
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{
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unsigned int result_hi = 0;
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unsigned int result_lo = 0;
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asm volatile ("mulh %0, %1, %2" : "=r"(result_hi): "r"(a), "r"(b));
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asm volatile ("mul %0, %1, %2" : "=r"(result_lo): "r"(a), "r"(b));
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Word64 result = result_hi;
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result <<= 32;
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result += result_lo;
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result += sum;
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return result;
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}
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static __inline Word64 SHL64(Word64 x, int n)
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{
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return (x<<n);
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}
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static __inline Word64 SAR64(Word64 x, int n)
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{
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return (x >> n);
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}
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#elif defined(__xtensa__)
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#include "xtensa/config/core-isa.h"
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typedef long long Word64;
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static __inline Word64 MADD64(Word64 sum64, int x, int y)
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{
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return (sum64 + ((long long)x * y));
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}
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#if XCHAL_HAVE_MUL32_HIGH
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static __inline int MULSHIFT32(int x, int y)
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{
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/* important rules for smull RdLo, RdHi, Rm, Rs:
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* RdHi and Rm can't be the same register
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* RdLo and Rm can't be the same register
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* RdHi and RdLo can't be the same register
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* Note: Rs determines early termination (leading sign bits) so if you want to specify
|
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* which operand is Rs, put it in the SECOND argument (y)
|
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* For inline assembly, x and y are not assumed to be R0, R1 so it shouldn't matter
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* which one is returned. (If this were a function call, returning y (R1) would
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* require an extra "mov r0, r1")
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*/
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int ret;
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asm volatile ("mulsh %0, %1, %2" : "=r" (ret) : "r" (x), "r" (y));
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return ret;
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}
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#else
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#error Missing definition of MULSHIFT32
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#endif
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#if XCHAL_HAVE_ABS
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static __inline int FASTABS(int x)
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{
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int ret;
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asm volatile ("abs %0, %1" : "=r" (ret) : "r" (x));
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return ret;
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}
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#else
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#error Missing definition of FASTABS
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#endif
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static __inline Word64 SAR64(Word64 x, int n)
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{
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return x >> n;
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}
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static __inline int CLZ(int x)
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{
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return __builtin_clz(x);
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}
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#else
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#error Unsupported platform in assembly.h
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#endif
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#endif /* platforms */
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#endif /* _ASSEMBLY_H */
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