#! armcc -E
; The first line specifies a preprocessor command that the linker invokes
; to pass a scatter file through a C preprocessor.

;*******************************************************************************
;* \file dfu_cm0p.scat
;* \version 3.0
;*
;* The linker file for the ARMCC.
;*
;* \note The entry point location is fixed and starts at 0x10000000. The valid
;* application image should be placed there.
;*
;* \note The linker files included with the PDL template projects must be
;* generic and handle all common use cases. Your project may not use every
;* section defined in the linker files. In that case, you may see the warnings
;* during the build process: L6314W (no section matches pattern) and/or L6329W
;* (pattern only matches removed unused sections). In your project, you can
;* suppress the warning by passing the "--diag_suppress=L6314W,L6329W" option to
;* the linker, simply comment out or remove the relevant code in the linker
;* file.
;*
;*******************************************************************************
;* \copyright
;* Copyright 2016-2018, Cypress Semiconductor Corporation.  All rights reserved.
;* You may use this file only in accordance with the license, terms, conditions,
;* disclaimers, and limitations in the end user license agreement accompanying
;* the software package with which this file was provided.
;******************************************************************************/

;* DFU SDK specific: includes defines common across all the applications
#include "dfu_mdk_common.h"

;* DFU SDK specific: defines the memory regions
;* Make sure the correct app no. is entered here.

; Flash
#define FLASH_START             CY_APP0_CORE0_FLASH_ADDR
#define FLASH_SIZE              CY_APP0_CORE0_FLASH_LENGTH

; Emulated EEPROM Flash area
#define EM_EEPROM_START         CY_APP0_CORE0_EM_EEPROM_ADDR
#define EM_EEPROM_SIZE          CY_APP0_CORE0_EM_EEPROM_LENGTH

; Supervisory flash: User data
#define SFLASH_USER_DATA_START  0x16000800
#define SFLASH_USER_DATA_SIZE   0x00000800

; Supervisory flash: Normal Access Restrictions (NAR)
#define SFLASH_NAR_START        0x16001A00
#define SFLASH_NAR_SIZE         0x00000200

; Supervisory flash: Public Key
#define SFLASH_PUBLIC_KEY_START 0x16005A00
#define SFLASH_PUBLIC_KEY_SIZE  0x00000C00

; Supervisory flash: Table of Content # 2
#define SFLASH_TOC_2_START      0x16007C00
#define SFLASH_TOC_2_SIZE       0x00000400

; External memory
#define XIP_START               CY_APP0_CORE0_SMIF_ADDR
#define XIP_SIZE                CY_APP0_CORE0_SMIF_LENGTH

; eFuse
#define EFUSE_START             0x90700000
#define EFUSE_SIZE              0x100000

; RAM
#define RAM_START               CY_APP0_CORE0_RAM_ADDR
#define RAM_SIZE                CY_APP0_CORE0_RAM_LENGTH


LR_FLASH FLASH_START FLASH_SIZE
{
    .cy_app_header +0
    {
        * (.cy_app_header)
    }

    ER_FLASH_VECTORS +0
    {
        * (RESET, +FIRST)
    }

    ER_FLASH_CODE +0 FIXED
    {
        * (InRoot$$Sections)
        * (+RO)
    }
    
    ER_RAM_COMMON CY_APP_RAM_COMMON_ADDR UNINIT
    {
        * (.cy_boot_noinit.appId)
    }

    ER_RAM_VECTORS RAM_START UNINIT
    {
        * (RESET_RAM, +FIRST)
    }

    ER_RAM_DATA +0
    {
        * (.cy_ramfunc)
        .ANY (+RW, +ZI)
    }

    ; Place variables in the section that should not be initialized during the
    ; device startup.
    ER_RAM_NOINIT_DATA +0 UNINIT
    {
        * (.noinit)
    }
}


; Emulated EEPROM Flash area
LR_EM_EEPROM EM_EEPROM_START EM_EEPROM_SIZE
{
    .cy_em_eeprom +0
    {
        * (.cy_em_eeprom)
    }
}

; Supervisory flash: User data
LR_SFLASH_USER_DATA SFLASH_USER_DATA_START SFLASH_USER_DATA_SIZE
{
    .cy_sflash_user_data +0
    {
        * (.cy_sflash_user_data)
    }
}

; Supervisory flash: Normal Access Restrictions (NAR)
LR_SFLASH_NAR SFLASH_NAR_START SFLASH_NAR_SIZE
{
    .cy_sflash_nar +0
    {
        * (.cy_sflash_nar)
    }
}

; Supervisory flash: Public Key
LR_SFLASH_PUBLIC_KEY SFLASH_PUBLIC_KEY_START SFLASH_PUBLIC_KEY_SIZE
{
    .cy_sflash_public_key +0
    {
        * (.cy_sflash_public_key)
    }
}

; Supervisory flash: Table of Content # 2
LR_SFLASH_TOC_2 SFLASH_TOC_2_START SFLASH_TOC_2_SIZE
{
    .cy_toc_part2 +0
    {
        * (.cy_toc_part2)
    }
}

; Places the code in the Execute in the Place (XIP) section. See the smif driver documentation for details.
LR_EROM XIP_START XIP_SIZE
{
    .cy_xip +0
    {
        * (.cy_xip)
    }
}


; eFuse
LR_EFUSE EFUSE_START EFUSE_SIZE
{
    .cy_efuse +0
    {
        * (.cy_efuse)
    }
}


; The section is used for additional metadata (silicon revision, Silicon/JTAG ID, etc.) storage.
CYMETA 0x90500000
{
    .cymeta +0 { * (.cymeta) }
}


/* [] END OF FILE */
