/***************************************************************************//**
* \file cy_si_config.h
* \version 1.0.1
*
* \brief
* Definitions and function prototypes for Secure Image.
*
********************************************************************************
* \copyright
* Copyright 2017-2018, Cypress Semiconductor Corporation. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
*******************************************************************************/

#ifndef _CY_SI_CONFIG_H_
#define _CY_SI_CONFIG_H_

#if defined(__cplusplus)
extern "C" {
#endif

/***************************************
*               Macros
***************************************/
/*
* Macros to define the secure image version and ID.
*/
#define CY_SI_VERSION_MAJOR             1UL /**< Major version */
#define CY_SI_VERSION_MINOR             0UL /**< Minor version */
#define CY_SI_APP_VERSION               ((CY_SI_VERSION_MAJOR << 24u) | (CY_SI_VERSION_MINOR << 16u)) /**< App Version */
#define CY_SI_ID                        CY_PDL_DRV_ID(0x38u)                            /**< Secure Image ID */
#define CY_SI_ID_INFO                   (uint32_t)( CY_SI_ID | CY_PDL_STATUS_INFO )     /**< Secure Image INFO ID */
#define CY_SI_ID_WARNING                (uint32_t)( CY_SI_ID | CY_PDL_STATUS_WARNING)   /**< Secure Image WARNING ID */
#define CY_SI_ID_ERROR                  (uint32_t)( CY_SI_ID | CY_PDL_STATUS_ERROR)     /**< Secure Image ERROR ID */
#define CY_SI_CHECKID(val)              ((uint32_t)(val) & (CY_PDL_MODULE_ID_Msk << CY_PDL_MODULE_ID_Pos)) /**< Check ID macro */

/*
* Clock selection for Flash boot execution.
*/
#define CY_SI_FLASHBOOT_CLK_25MHZ       (0x00UL)            /**< 25MHz clock selection for Flashboot */
#define CY_SI_FLASHBOOT_CLK_8MHZ        (0x01UL)            /**< 8MHz clock selection for Flashboot */
#define CY_SI_FLASHBOOT_CLK_50MHZ       (0x02UL)            /**< 50MHz clock selection for Flashboot */

/*
* Debugger wait window selection for Flash boot execution.
*/
#define CY_SI_FLASHBOOT_WAIT_20MS       (0x00UL)            /**< 20ms debugger wait window for Flashboot */
#define CY_SI_FLASHBOOT_WAIT_10MS       (0x01UL)            /**< 10ms debugger wait window for Flashboot */
#define CY_SI_FLASHBOOT_WAIT_1MS        (0x02UL)            /**< 1ms debugger wait window for Flashboot */
#define CY_SI_FLASHBOOT_WAIT_0MS        (0x03UL)            /**< 0ms debugger wait window for Flashboot */
#define CY_SI_FLASHBOOT_WAIT_100MS      (0x04UL)            /**< 100ms debugger wait window for Flashboot */

/*
* Flash boot validation selection in chip NORMAL mode.
*/
#define CY_SI_FLASHBOOT_VALIDATE_NO     (0x00UL)            /**< Do not validate app1 in NORMAL mode */
#define CY_SI_FLASHBOOT_VALIDATE_YES    (0x01UL)            /**< Validate app1 in NORMAL mode */

/*
* Application format selection for secure boot.
*/
#define CY_SI_APP_FORMAT_BASIC          (0UL)               /**< Basic application format (no header) */
#define CY_SI_APP_FORMAT_CYPRESS        (1UL)               /**< Cypress application format (Cypress header) */


/*
* Application type selection for secure boot.
*/
#define CY_SI_APP_ID_FLASHBOOT          (0x8001UL)          /**< Flash boot ID Type */
#define CY_SI_APP_ID_SECUREIMG          (0x8002UL)          /**< Secure image ID Type */
#define CY_SI_APP_ID_BOOTLOADER         (0x8003UL)          /**< Bootloader ID Type */


/***************************************
*            Constants
***************************************/
#define CY_ARM_CM0P_CPUID        (0xC6000000u)      /** CM0+ partNo value from ARM CPUID[15:4] register shifted to [31:20] bits */
#define CY_ARM_CM4_CPUID         (0xC2400000u)      /** CM4  partNo value from ARM CPUID[15:4] register shifted to [31:20] bits */

#define CY_SI_TOC_FLAGS_CLOCKS_MASK     (0x00000003UL)      /**< Mask for Flashboot clock selection */
#define CY_SI_TOC_FLAGS_CLOCKS_POS      (0UL)               /**< Bit position of Flashboot clock selection */
#define CY_SI_TOC_FLAGS_DELAY_MASK      (0x0000001CUL)      /**< Mask for Flashboot wait window selection */
#define CY_SI_TOC_FLAGS_DELAY_POS       (2UL)               /**< Bit position of Flashboot wait window selection */
#define CY_SI_TOC_FLAGS_APP_VERIFY_MASK (0x80000000UL)      /**< Mask for Flashboot NORMAL mode app1 validation */
#define CY_SI_TOC_FLAGS_APP_VERIFY_POS  (31UL)              /**< Bit position of Flashboot NORMAL mode app1 validation */

#define CY_SI_TOC2_MAGICNUMBER          (0x01211220UL)  /**< TOC2 identifier */

/***************************************
*               Structs
***************************************/
/** Table of Content structure */
typedef struct{
    volatile uint32_t objSize;       /**< Object size (Bytes) */
    volatile uint32_t magicNum;      /**< TOC ID (magic number) */
    volatile uint32_t userKeyAddr;   /**< Secure key address in user Flash */
    volatile uint32_t smifCfgAddr;   /**< SMIF configuration structure */
    volatile uint32_t appAddr1;      /**< First user application object address */
    volatile uint32_t appFormat1;    /**< First user application format */
    volatile uint32_t appAddr2;      /**< Second user application object address */
    volatile uint32_t appFormat2;    /**< Second user application format */
    volatile uint32_t shashObj;      /**< Number of additional objects to be verified (S-HASH) */
    volatile uint32_t sigKeyAddr;    /**< Signature verification key address */
    volatile uint32_t addObj[116];   /**< Additional objects to include in S-HASH */
    volatile uint32_t tocFlags;      /**< Flags in TOC to control Flash boot options */
    volatile uint32_t crc;           /**< CRC16-CCITT */
}cy_stc_si_toc_t;

/** User application header in Cypress format */
typedef struct{
    volatile uint32_t objSize;       /**< Object size (Bytes) */
    volatile uint32_t appId;         /**< Application ID/version */
    volatile uint32_t appAttributes; /**< Attributes (reserved for future use) */
    volatile uint32_t numCores;      /**< Number of cores */
    volatile uint32_t core0Vt;       /**< (CM0+)VT offset - offset to the vector table from that entry */
    volatile uint32_t core1Vt;       /**< (CM4)VT offset - offset to the vector table from that entry */
    volatile uint32_t core0Id;       /**< CM0+ core ID */
    volatile uint32_t core1Id;       /**< CM4 core ID */
}cy_stc_user_appheader_t;


#if defined(__cplusplus)
}
#endif

#endif /* _CY_SI_CONFIG_H_ */

/* [] END OF FILE */
