Hardware/2024A-HW
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

Initial public release.

Browse source
This commit is contained in:
Joe Kearney 2025-01-25 12:53:13 -06:00
parent aec57087e5
commit 6569617eb2
15 changed files with 115619 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

30
.gitignore vendored Normal file
View file

@ -0,0 +1,30 @@
# ---> KiCad
# For PCBs designed using KiCad: https://www.kicad.org/
# Format documentation: https://kicad.org/help/file-formats/
# Temporary files
*.000
*.bak
*.bck
*.kicad_pcb-bak
*.kicad_sch-bak
*-backups
*.kicad_prl
*.sch-bak
*~
_autosave-*
*.tmp
*-save.pro
*-save.kicad_pcb
fp-info-cache
# Netlist files (exported from Eeschema)
*.net
# Autorouter files (exported from Pcbnew)
*.dsn
*.ses
# Exported BOM files
*.xml
*.csv

46442
2024A.Rounded.kicad_pcb Normal file
View file

File diff suppressed because it is too large Load diff

2
2024A.Rounded.round-tracks-config Normal file
View file

@ -0,0 +1,2 @@
Default True 2.0 3
False True False

33081
2024A.kicad_pcb Normal file
View file

File diff suppressed because it is too large Load diff

720
2024A.kicad_pro Normal file
View file

@ -0,0 +1,720 @@
{
"board": {
"3dviewports": [],
"design_settings": {
"defaults": {
"apply_defaults_to_fp_fields": false,
"apply_defaults_to_fp_shapes": false,
"apply_defaults_to_fp_text": false,
"board_outline_line_width": 0.15,
"copper_line_width": 0.2,
"copper_text_italic": false,
"copper_text_size_h": 1.5,
"copper_text_size_v": 1.5,
"copper_text_thickness": 0.3,
"copper_text_upright": false,
"courtyard_line_width": 0.05,
"dimension_precision": 4,
"dimension_units": 3,
"dimensions": {
"arrow_length": 1270000,
"extension_offset": 500000,
"keep_text_aligned": true,
"suppress_zeroes": false,
"text_position": 0,
"units_format": 1
},
"fab_line_width": 0.1,
"fab_text_italic": false,
"fab_text_size_h": 1.0,
"fab_text_size_v": 1.0,
"fab_text_thickness": 0.15,
"fab_text_upright": false,
"other_line_width": 0.1,
"other_text_italic": false,
"other_text_size_h": 1.0,
"other_text_size_v": 1.0,
"other_text_thickness": 0.15,
"other_text_upright": false,
"pads": {
"drill": 3.175,
"height": 6.35,
"width": 6.35
},
"silk_line_width": 0.15,
"silk_text_italic": false,
"silk_text_size_h": 1.0,
"silk_text_size_v": 1.0,
"silk_text_thickness": 0.15,
"silk_text_upright": false,
"zones": {
"45_degree_only": false,
"min_clearance": 0.508
}
},
"diff_pair_dimensions": [
{
"gap": 0.0,
"via_gap": 0.0,
"width": 0.0
}
],
"drc_exclusions": [],
"meta": {
"version": 2
},
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"connection_width": "warning",
"copper_edge_clearance": "error",
"copper_sliver": "warning",
"courtyards_overlap": "error",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint": "error",
"footprint_symbol_mismatch": "warning",
"footprint_type_mismatch": "error",
"hole_clearance": "error",
"hole_near_hole": "error",
"holes_co_located": "warning",
"invalid_outline": "error",
"isolated_copper": "warning",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"length_out_of_range": "error",
"lib_footprint_issues": "ignore",
"lib_footprint_mismatch": "warning",
"malformed_courtyard": "error",
"microvia_drill_out_of_range": "error",
"missing_courtyard": "ignore",
"missing_footprint": "warning",
"net_conflict": "warning",
"npth_inside_courtyard": "ignore",
"padstack": "error",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_edge_clearance": "ignore",
"silk_over_copper": "ignore",
"silk_overlap": "ignore",
"skew_out_of_range": "error",
"solder_mask_bridge": "ignore",
"starved_thermal": "error",
"text_height": "ignore",
"text_thickness": "ignore",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_dangling": "warning",
"track_width": "error",
"tracks_crossing": "error",
"unconnected_items": "error",
"unresolved_variable": "error",
"via_dangling": "warning",
"zones_intersect": "error"
},
"rules": {
"allow_blind_buried_vias": false,
"allow_microvias": false,
"max_error": 0.005,
"min_clearance": 0.0,
"min_connection": 0.0,
"min_copper_edge_clearance": 0.075,
"min_hole_clearance": 0.25,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.2,
"min_microvia_drill": 0.1,
"min_resolved_spokes": 2,
"min_silk_clearance": 0.0,
"min_text_height": 0.8,
"min_text_thickness": 0.08,
"min_through_hole_diameter": 0.254,
"min_track_width": 0.1524,
"min_via_annular_width": 0.05,
"min_via_diameter": 0.381,
"solder_mask_clearance": 0.0,
"solder_mask_min_width": 0.0,
"solder_mask_to_copper_clearance": 0.005,
"use_height_for_length_calcs": true
},
"teardrop_options": [
{
"td_onpadsmd": true,
"td_onroundshapesonly": false,
"td_ontrackend": false,
"td_onviapad": true
}
],
"teardrop_parameters": [
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_round_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_rect_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_track_end",
"td_width_to_size_filter_ratio": 0.9
}
],
"track_widths": [
0.0,
0.2032,
0.254,
0.381,
0.508,
1.0,
1.27
],
"tuning_pattern_settings": {
"diff_pair_defaults": {
"corner_radius_percentage": 80,
"corner_style": 1,
"max_amplitude": 1.0,
"min_amplitude": 0.2,
"single_sided": false,
"spacing": 1.0
},
"diff_pair_skew_defaults": {
"corner_radius_percentage": 80,
"corner_style": 1,
"max_amplitude": 1.0,
"min_amplitude": 0.2,
"single_sided": false,
"spacing": 0.6
},
"single_track_defaults": {
"corner_radius_percentage": 80,
"corner_style": 1,
"max_amplitude": 1.0,
"min_amplitude": 0.2,
"single_sided": false,
"spacing": 0.6
}
},
"via_dimensions": [
{
"diameter": 0.0,
"drill": 0.0
},
{
"diameter": 0.635,
"drill": 0.3175
},
{
"diameter": 1.27,
"drill": 0.762
}
],
"zones_allow_external_fillets": false,
"zones_use_no_outline": true
},
"ipc2581": {
"dist": "",
"distpn": "",
"internal_id": "",
"mfg": "",
"mpn": ""
},
"layer_presets": [],
"viewports": []
},
"boards": [],
"cvpcb": {
"equivalence_files": []
},
"erc": {
"erc_exclusions": [],
"meta": {
"version": 0
},
"pin_map": [
[
0,
0,
0,
0,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
2,
0,
1,
0,
0,
1,
0,
2,
2,
2,
2
],
[
0,
0,
0,
0,
0,
0,
1,
0,
1,
0,
1,
2
],
[
0,
1,
0,
0,
0,
0,
1,
1,
2,
1,
1,
2
],
[
0,
0,
0,
0,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
2
],
[
1,
1,
1,
1,
1,
0,
1,
1,
1,
1,
1,
2
],
[
0,
0,
0,
1,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
2,
1,
2,
0,
0,
1,
0,
2,
2,
2,
2
],
[
0,
2,
0,
1,
0,
0,
1,
0,
2,
0,
0,
2
],
[
0,
2,
1,
1,
0,
0,
1,
0,
2,
0,
0,
2
],
[
2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2
]
],
"rule_severities": {
"bus_definition_conflict": "error",
"bus_entry_needed": "error",
"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"conflicting_netclasses": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_reference": "error",
"duplicate_sheet_names": "error",
"endpoint_off_grid": "warning",
"extra_units": "error",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"lib_symbol_issues": "warning",
"missing_bidi_pin": "warning",
"missing_input_pin": "warning",
"missing_power_pin": "error",
"missing_unit": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
"no_connect_dangling": "warning",
"pin_not_connected": "error",
"pin_not_driven": "error",
"pin_to_pin": "error",
"power_pin_not_driven": "error",
"similar_labels": "warning",
"simulation_model_issue": "ignore",
"unannotated": "error",
"unit_value_mismatch": "error",
"unresolved_variable": "error",
"wire_dangling": "error"
}
},
"libraries": {
"pinned_footprint_libs": [],
"pinned_symbol_libs": []
},
"meta": {
"filename": "2024A.kicad_pro",
"version": 1
},
"net_settings": {
"classes": [
{
"bus_width": 12,
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6
}
],
"meta": {
"version": 3
},
"net_colors": null,
"netclass_assignments": null,
"netclass_patterns": []
},
"pcbnew": {
"last_paths": {
"gencad": "",
"idf": "",
"netlist": "",
"plot": "",
"pos_files": "",
"specctra_dsn": "",
"step": "",
"svg": "",
"vrml": ""
},
"page_layout_descr_file": ""
},
"schematic": {
"annotate_start_num": 0,
"bom_fmt_presets": [],
"bom_fmt_settings": {
"field_delimiter": ",",
"keep_line_breaks": false,
"keep_tabs": false,
"name": "CSV",
"ref_delimiter": ",",
"ref_range_delimiter": "",
"string_delimiter": "\""
},
"bom_presets": [],
"bom_settings": {
"exclude_dnp": false,
"fields_ordered": [
{
"group_by": false,
"label": "Reference",
"name": "Reference",
"show": true
},
{
"group_by": true,
"label": "Value",
"name": "Value",
"show": true
},
{
"group_by": false,
"label": "Datasheet",
"name": "Datasheet",
"show": false
},
{
"group_by": false,
"label": "Footprint",
"name": "Footprint",
"show": false
},
{
"group_by": false,
"label": "Qty",
"name": "${QUANTITY}",
"show": true
},
{
"group_by": true,
"label": "DNP",
"name": "${DNP}",
"show": true
},
{
"group_by": false,
"label": "#",
"name": "${ITEM_NUMBER}",
"show": false
},
{
"group_by": false,
"label": "DNP",
"name": "DNP",
"show": false
},
{
"group_by": false,
"label": "Desc",
"name": "Desc",
"show": true
},
{
"group_by": false,
"label": "Dielectric",
"name": "Dielectric",
"show": false
},
{
"group_by": false,
"label": "JLCPCB Part #",
"name": "JLCPCB Part #",
"show": true
},
{
"group_by": false,
"label": "MacroFab",
"name": "MacroFab",
"show": false
},
{
"group_by": false,
"label": "Manf",
"name": "Manf",
"show": true
},
{
"group_by": false,
"label": "Manf#",
"name": "Manf#",
"show": true
},
{
"group_by": false,
"label": "Package",
"name": "Package",
"show": false
},
{
"group_by": false,
"label": "Power",
"name": "Power",
"show": false
},
{
"group_by": false,
"label": "Tolerance",
"name": "Tolerance",
"show": false
},
{
"group_by": false,
"label": "Voltage",
"name": "Voltage",
"show": false
},
{
"group_by": false,
"label": "Description",
"name": "Description",
"show": true
}
],
"filter_string": "",
"group_symbols": true,
"name": "",
"sort_asc": true,
"sort_field": "Reference"
},
"connection_grid_size": 50.0,
"drawing": {
"dashed_lines_dash_length_ratio": 12.0,
"dashed_lines_gap_length_ratio": 3.0,
"default_line_thickness": 6.0,
"default_text_size": 50.0,
"field_names": [],
"intersheets_ref_own_page": false,
"intersheets_ref_prefix": "",
"intersheets_ref_short": false,
"intersheets_ref_show": false,
"intersheets_ref_suffix": "",
"junction_size_choice": 3,
"label_size_ratio": 0.375,
"operating_point_overlay_i_precision": 3,
"operating_point_overlay_i_range": "~A",
"operating_point_overlay_v_precision": 3,
"operating_point_overlay_v_range": "~V",
"overbar_offset_ratio": 1.23,
"pin_symbol_size": 25.0,
"text_offset_ratio": 0.15
},
"legacy_lib_dir": "",
"legacy_lib_list": [],
"meta": {
"version": 1
},
"net_format_name": "",
"ngspice": {
"fix_include_paths": true,
"fix_passive_vals": false,
"meta": {
"version": 0
},
"model_mode": 0,
"workbook_filename": ""
},
"page_layout_descr_file": "",
"plot_directory": "",
"spice_adjust_passive_values": false,
"spice_current_sheet_as_root": false,
"spice_external_command": "spice \"%I\"",
"spice_model_current_sheet_as_root": true,
"spice_save_all_currents": false,
"spice_save_all_dissipations": false,
"spice_save_all_voltages": false,
"subpart_first_id": 65,
"subpart_id_separator": 0
},
"sheets": [
[
"79d80323-c2e2-468c-b4d0-3aee2dec9374",
"Root"
],
[
"f7708a3f-e298-4423-89d7-609b5414644f",
"IR Receive"
],
[
"95f90aa4-d3ba-47e1-b4de-ade2e4b752b3",
"IR Transmit"
],
[
"e9951ac6-0880-4bd5-8303-7dc534fac263",
"User Interface"
],
[
"ea4f304c-b263-47fa-99b4-7e1a87353657",
"Miscellaneous"
]
],
"text_variables": {}
}

7141
2024A.kicad_sch Normal file
View file

File diff suppressed because it is too large Load diff

281
LICENSE_HOWTO.txt Normal file
View file

@ -0,0 +1,281 @@
CERN Open Hardware Licence Version 2 - Strongly Reciprocal
User Guide
September 2, 2020
Guide version: 1.0
1 Introduction
This document contains guidelines on how to apply the CERN-OHL-S v2 to a given
hardware design, and on the use of hardware designs licenced under CERN-OHL-S
v2. This means we will be talking to you sometimes as a licensor, and other
times as a licencee.
As a licensor, there are many ways in which you can make it clear to your
licencees that you are sharing your designs under the licence. These guidelines
are only to be taken as advice, illustrating some ways in which we think this
can be done efficiently.
To help you distinguish between requirements imposed by the licence (mostly as a
licencee) and our suggestions to you (mostly as a licensor), we will use the
word 'rule' for the former and the word 'suggestion' for the latter. Any
perceived contradiction between these guidelines and the licence text should of
course be resolved in favour of the licence text.
2 How to apply CERN-OHL-S v2 to a hardware design
2.1 Pre-requisite
Authorship/ownership of the design must be clear and undisputed. Only the legal
owner of the rights in the hardware design may decide under what conditions to
make it available. Generally, if ownership is vested in more than one
person/entity, there must be an agreement among the owners (or a chain of
compatible licences from each of them) to release the hardware design as open
hardware, and under the CERN-OHL-S v2 in particular.
2.2 Your sources
Nowadays, most designers who intend to share their work do so by hosting their
design files (sources) in a publicly-accessible repository using version control
systems such as git. The sites hosting these repositories usually provide users
with the convenience of downloading a whole repository as a compressed (e.g.
zip) file. Using these platforms is a very effective way of working: it makes it
easier for you to receive feedback, shows your users the complete history of the
project and allows them to easily start using it and contributing improvements.
2.2.1 Suggestion: try to host your design in a publicly-accessible repository
using version control. If that is not possible, compress your whole
directory structure into one file and publish that file, so users get your
whole project in one go.
If your goal is to share, it makes sense to provide enough information to users
about the contents of the design package they download, and to make it easy for
them to browse that information. For example, if you have designed your hardware
using proprietary tools, people who download the design files may not have
access to the tools you used. Sometimes you can also provide exported versions
of those files which, although not as useful for modification as the originals,
will make life easier for people who want to understand your designs. For
example, PCB schematics and layout can be exported as pdf files, and 3D
mechanical designs can be exported to the STEP format.
2.2.2 Suggestion: include in your design sources versions of the files exported
to formats everybody can read. It would be helpful to specify the tools
you used, and, if they are publicly available under free and open source
licences, provide information about where the recipient can find them.
It can also be good to let people know that you are following this guide, so
they see why you are doing things in this or that way.
2.2.3 Suggestion: include a copy of this user guide, in pdf or plain text
format, in your sources.
Of course, although not strictly necessary, you should also include a copy of
the licence text (CERN-OHL-S v2 in this case) in pdf or plain text form. Your
design files will anyway be identified as licenced under that licence, with a
URL pointing to the licence text, but it does not hurt to include the licence
text in the source package for the convenience of the user and to make it very
visible that the whole design is open source.
2.2.4 Suggestion: include a copy of the CERN-OHL-S v2 licence text, in pdf or
plain text format, in your sources, and failing that, provide a link to
the licence at https://ohwr.org/cern_ohl_s_v2.txt.
One of the requirements for licencees who make modifications to the design and
publish those modifications is to make them explicit in a dedicated text file.
As a licensor, you can make this obligation more easy for licencees to see and
bear in mind by including a placeholder file called CHANGES.txt in your sources.
2.2.5 Suggestion: include an empty CHANGES.txt file in your sources. You may
write a few lines in the beginning of the file stating that anyone
modifying the design should provide brief information about the
modifications, including the date they were made, and stating that
information about the design should be added but never removed from that
file. It could also state that, according to section 3.3.b of the licence,
licencees should provide a brief entry with a date and the nature of the
modification for each design change. For example '26 April 2020: AC/DC
power converter circuit removed as AC input no longer necessary'.
Now, as you have seen, as the initial licensor, relatively few rules apply to
you. We are going to assume that it is your intent to licence your design under
CERN-OHL-S v2 though, and in that sense the minimal requirements are going to be
described as 'rules' below. Some files can easily include a header or a text box
with copyright and licensing information which will be easily visible to whoever
opens them. For file types which do not easily grant that possibility, consider
using a separate text file taking as its name the name of the original file with
'.licence' appended to it. So if you have e.g. a file called
`my_3d_design.FCStd', you can add another file in the same directory called
`my_3d_design.FCStd.licence' which is a text file containing copyright and
licensing information. If the number of files in your project is large and the
'.licence' method is deemed too cumbersome, you can centralise all your
licensing information in a single text file following the Debian DEP5
specification. Both the '.licence' and the DEP5 methods are suggested in the
REUSE guidelines. See https://reuse.software/for details.
2.2.6 Rule: include for each source file, either embedded in the file itself or
in a separate text file which refers to it:
(a) a copyright notice reflecting actual ownership;
(b) a notice that the hardware design source is licenced under the CERN-
OHL-S v2, possibly with a link to https://ohwr.org/cern_ohl_s_v2.txt:
i."Licensed under CERN-OHL-S v2 or any later version" or
ii."Licensed under CERN-OHL-S v2";
(c) a disclaimer of warranties;
(d) a Source Location if you wish to specify one;
(e) optionally, a Notice specifying that you wish the Source Location to
remain visible on the Product (or its packaging, or in its
documentation) even after modifications.
Here is an example for a hypothetical designer called Sam Smith hosting a
design called Gizmo at https://example_url:
------------------------------------------------------------------------------
| Copyright Sam Smith 2020. |
| |
| This source describes Open Hardware and is licenced under the CERN-OHL-S v2. |
| |
| You may redistribute and modify this source and make products using it under |
| the terms of the CERN-OHL-S v2 (https://ohwr.org/cern_ohl_s_v2.txt). |
| |
| This source is distributed WITHOUT ANY EXPRESS OR IMPLIED WARRANTY, |
| INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY AND FITNESS FOR A |
| PARTICULAR PURPOSE. Please see the CERN-OHL-S v2 for applicable conditions. |
| |
| Source location: https://example_url |
| |
| As per CERN-OHL-S v2 section 4, should You produce hardware based on this |
| source, You must where practicable maintain the Source Location visible |
| on the external case of the Gizmo or other products you make using this |
| source. |
------------------------------------------------------------------------------
The first three lines in the example above, containing copyright and licence
type, can be substituted by a valid SPDX header, like this:
SPDX-FileCopyrightText: 2020 Sam Smith <sam@example.com>
SPDX-License-Identifier: CERN-OHL-S-2.0
or, in case the 'or any later version' option is preferred:
SPDX-FileCopyrightText: 2020 Sam Smith <sam@example.com>
SPDX-License-Identifier: CERN-OHL-S-2.0+
2.2.7 Suggestion: use standard SPDX headers whenever possible so that your
choice of licence is easy to understand by humans and computers alike.
Why would you licence your design under 'CERN-OHL-S v2 or any later version'?
Imagine we discovered a shortcoming of the licence which made us write a new
version, let's say version 3.0, to fix it. Let us further imagine that we
decided to make v3 incompatible with v2 (this actually happened with the GPL).
If you licenced your design under 'v2 only' that means it could not be combined
with new designs licenced under v3. If, on the other hand, you licence your
design under 'v2 or any later version', you give future licencees the option of
interpreting the design as licenced under the hypothetical v3, and there would
be no compatibility issues. This is quite an important decision to take when you
use a reciprocal licence, so we thought we'd mention it in this guide. You have
to make your own judgment as to whether you believe that CERN can be trusted to
ensure that future versions of the CERN-OHL will be similar in spirit and effect
to this version.
2.2.8 Suggestion: give some thought to the 'or any later version' option before
publishing your design under CERN-OHL-S v2.
We are going to assume that you, as a licensor, want people who receive a
product based on your design to know that it is Open Hardware and where they can
find the design files for that product, hence:
2.2.9 Rule: include in a part of the Source corresponding to a visible part of
the Product (e.g. silkscreen or top copper for a printed circuit board):
(a) the licence notice: "Licensed under CERN-OHL-S v2";
(b) the Source Location.
2.2.10 Suggestion: You can optionally include a copyright notice to be printed
on the Product (remember you must keep intact any Notices in the source,
though). If you do, and your design includes part of other designs, you
should at least acknowledge the work is not all your own by using e.g.
Copyright Sam Smith and others. In any case, do not include the CERN
logo.
2.3 A Note on Components
If your design is modular, consider licensing each of the components you have
designed separately, and then having an overarching design, also licenced under
an appropriate variant of CERN-OHL which contains each of the sub-components as
an Available Component. This will make life easier for licencees who only want
to make use of one component of your design.
3 How to deal with hardware designs licenced under CERN-OHL-S v2
Generally speaking, you must comply with the requirements applying to a
particular design detailed in the accompanying licence. If you receive hardware
designs licenced under the CERN-OHL-S v2, the requirements are to:
3.1 Rule: keep intact all the copyright, acknowledgement and trademark notices
and Source Location notices that are on the hardware design sources.
3.2 Rule: keep intact the references to the CERN-OHL-S v2.
3.3 Rule: keep intact the disclaimer of warranties.
3.1 Design modifications and publication
If you modify a hardware design licenced by someone else under CERN-OHL-S v2,
and you want to publish your modified design, or you need to publish it e.g. as
a result of the obligations attached to the production and distribution of
products, you must:
3.1.1 Rule: keep intact all the notices referred to above, although you may
remove notices that are no longer relevant to your design (for example, if
the design you are using contains a power supply and a processor board,
and you are only using the processor board in your own design, you can
remove the notices relating to the power supply, so long as you are sure
they only relate to the power supply).
3.1.2 Rule: include notices stating that you have modified the hardware de-
signs, giving a date and information about the modifications you have made
(e.g. in a CHANGES.txt file).
3.1.3 Rule: add the appropriate copyright notice and Source Location to the
modifications that were made.
3.1.4 Rule: licence the modifications under the 'CERN-OHL-S v2' (or 'CERN- OHL-S
v2 or any later version' if permitted by the original licensor, and all
other components of the design allow you to licence with the 'or any later
version' option).
3.1.5 Rule: if your design is a modification of someone else's design, or
incorporates parts of another's design, and in each case the other's
design is released under CERN-OHL, CERN-OHL-W or CERN-OHL-S you must (if
your tools allow this) include in your design sources versions of the
files exported to formats everybody can read using tools available under a
free or open source software licence. By CERN-OHL we mean any of the
earlier versions of the licence, prior to v2.
3.2 Hardware production and distribution
If, as a licencee, you want to produce hardware based on a design licenced under
CERN-OHL-S v2 and/or distribute that hardware, you need to:
3.2.1 Rule: either provide each recipient with a copy of the Complete Source or
ensure that each recipient is notified of the Source Location of the
Complete Source.
By Complete Source, we mean all files needed to make the hardware. Please see
the licence text for details. You also need to respect, if applicable, the
will expressed by the licensor to have a clear visual indication of the Source
Location on the hardware:
3.2.2 Rule: if specified in a Notice by the licensor, the Product must visibly
and securely display the Source Location on it or its packaging or
documentation in the manner specified in that Notice.
4 Asking for help
If there is something unclear in this guide, or you have any question on how to
apply the licence, the best place to ask is the CERN OHL forum at
https://forums.ohwr.org/c/cernohl. You may also find useful information in the
FAQs at https://www.ohwr.org/project/cernohl/wikis/faq.

34
README.md
View file

@ -1,3 +1,35 @@
# 2024A-HW
Hardware design files for the KTag 2024A "32ESPecial".
This repo contains the hardware design files for the KTag 2024A "32ESPecial". This hardware is part of the KTag project, a DIY laser tag game with customizable features and wide interoperability.
🛡️ <https://ktag.clubk.club> 🃞
## Where To Get More Information
The primary documentation for the 32ESPecial is on the KTag website at <https://ktag.clubk.club/Devices/32ESPecial/>.
You can ask questions (and get answers!) about this hardware on the KTag forum at <https://forum.ktag.clubk.club/c/hardware/>
## Associated Software
Software necessary to make good use of this hardware is available at <https://git.ktag.clubk.club/Software/2024A-SW/>.
## License
Copyright © 2024-2025 Joseph P. Kearney and the KTag developers.
These source files describe Open Hardware and are licensed under the CERN-OHL-S-2.0.
You may redistribute and modify these files and make products using them under
the terms of the [CERN-OHL-S-2.0](./LICENSE) (https://ohwr.org/cern_ohl_s_v2.txt)
These files are distributed WITHOUT ANY EXPRESS OR IMPLIED WARRANTY,
INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY, AND FITNESS FOR A
PARTICULAR PURPOSE. Please see the CERN-OHL-S-2.0 for applicable conditions.
Source location: <https://git.ktag.clubk.club/Hardware/2024A-HW/>
As per CERN-OHL-S-2.0 section 4, should You produce hardware based on these
files, You must where practicable maintain the Source Location visible
on the external case of the Gizmo or other products you make using this
source. See the [LICENSE_HOWTO](./LICENSE_HOWTO.txt) for more information.

4669
bom/KTag_2024A_32ESPecial_Rev_2.html Normal file
View file

File diff suppressed because one or more lines are too long

1
fabrication-toolkit-options.json Normal file
View file

@ -0,0 +1 @@
{"EXTRA_LAYERS": "", "EXTEND_EDGE_CUT": false, "ALTERNATIVE_EDGE_CUT": false, "AUTO TRANSLATE": true, "AUTO FILL": true, "EXCLUDE DNP": true}

31
ibom.config.ini Normal file
View file

@ -0,0 +1,31 @@
[html_defaults]
dark_mode=1
show_pads=1
show_fabrication=0
show_silkscreen=1
redraw_on_drag=1
highlight_pin1=selected
board_rotation=0
offset_back_rotation=0
checkboxes=Sourced,Placed
bom_view=left-right
layer_view=FB
compression=1
open_browser=1
[general]
bom_dest_dir=bom
bom_name_format=%p_rev_%r
component_sort_order=C,R,L,D,U,Y,X,F,SW,A,~,HS,CNN,J,P,NT
component_blacklist=FID*,JP*,KIBUZZARD*,MH*,REF*,Z*
blacklist_virtual=0
blacklist_empty_val=0
include_tracks=1
include_nets=1
[fields]
show_fields=Value,Manf,Manf#,Desc
group_fields=Value
normalize_field_case=1
board_variant_field=
board_variant_whitelist=
board_variant_blacklist=
dnp_field=

4157
ir_receive.kicad_sch Normal file
View file

File diff suppressed because it is too large Load diff

4933
ir_transmit.kicad_sch Normal file
View file

File diff suppressed because it is too large Load diff

7945
miscellaneous.kicad_sch Normal file
View file

File diff suppressed because it is too large Load diff

6153
user_interface.kicad_sch Normal file
View file

File diff suppressed because it is too large Load diff